Open-source photonic IC design  ·  λ = 1550 nm

Draw the chip.
Watch the light.

Lunima is a free, open-source design tool for photonic integrated circuits. Route waveguides the way you'd edit vectors in Figma, watch simulated power flow live on the canvas, bring your own PDK — and take everything with you in open formats.

Windows · Linux · macOS — MIT licensed

▶ CW  Simulation complete: 2 source(s), 12 connections @ 1550 nm Zoom: 78% | Components: 12 | Connections: 12
The Lunima main window running a live CW simulation on a Mach-Zehnder chip: waveguides colored by simulated power flow with dB labels, golden DC metal traces to probe and bond pads, diagonal routing and hand-styled bends.

If you route by hand

Routing that answers to you

Click a connection and it becomes geometry you can grab: in-canvas bend-radius handles, live length and loss on every segment, exact numbers everywhere. The router suggests — it never overwrites what you set.

  • Per-connection styles — SBend, Bend, custom radii; freeze routes you've tuned.
  • Process-aware — routing honors your process's minimum bend radius; handles clamp to it.
  • Diagonal 45° routingopt-in beta — denser layouts; still slow on large designs.
  • Auto crossing insertionopt-in — a real PDK crossing component, only where you allow it.
  • Metal routing — wire DC probe and bond pads next to the optical layer.
[S]  Select — Routing: Bend radius 69 µm | 413 µm, 0.14 dB
Figma-style waveguide editing: a selected connection shows draggable in-canvas bend-radius handles with live radius labels, and the per-connection Routing panel is set to the Bend style.

If you simulate — and then measure

Simulation lives on the canvas

Run CW and read power straight off the waveguides. Go time-domain when you need it. And when your devices come back from the fab, load the measured S-matrices onto the very components you drew.

  • Transient — IFFT of the circuit S-parameters with pulse, CW or PRBS sources; a sample-mode driver runs active, time-dependent compact models.
  • Eye / BER — PRBS eye-persistence heat maps with Q-factor and BER (shot/thermal/RIN noise), plus CSV export.
  • ONA sweeps — transmission over wavelength via the Optical Network Analyzer component.
  • FDTD with Meep — recompute a component's S-matrix from its geometry in Docker, with a guided setup dialog.
  • Measured data in — load S-matrices from file; probe waveguide modes and fiber overlap right on the canvas.
Transient  IFFT · GaussianPulse @ 1550 nm Done — 3 output pin(s)
Transient analysis panel plotting time-domain power of three output pins — MZI bar and cross ports and the photodetector input — as separate toggleable traces.
Eye / BER  PRBS-7 @ 25 Gbps threshold 0.50 | Export CSV
Eye/BER analysis: a PRBS-7 modulated transient folded into an eye-persistence heat map at 25 gigabits per second, with bit rate, pattern and threshold controls.

If you run your own fab

Your PDK is a first-class citizen

Custom PDKs aren't an expert backdoor. Define components in gdsfactory or nazca Python, preview the geometry, compute the S-matrix with Meep — and keep your process data (it's entered per process, never shipped).

  • One editor for everything — code, geometry preview and S-matrix side by side.
  • Fork-on-save — editing a bundled component forks it into your PDK, shadowing the original; restore it any time.
  • Trash, not dread — deleted PDKs and components restore for 30 days.
  • Process editor — layer stack, cross-sections with min/recommended bend radii the router enforces, and your own refractive indices.
  • Design checks — validate against the process, with layer-divergence warnings.
Edit  1x2 MMI Splitter — Demo PDK GdsFactory | Compute with Meep
The unified component editor: fork-on-save banner, PDK and fabrication-process context, syntax-highlighted gdsfactory Python code, a rendered geometry preview of the 1x2 MMI, and one-click S-matrix computation via Meep FDTD.

If you tape out

Built to tape out

Layouts target real foundry processes from the first component you place — so what leaves the Export menu is a GDS a fab can actually make, not a pretty schematic.

  • Real foundry PDKs, bundled — CornerStone SiN 300 nm and the open SiEPIC EBeam SOI 220 nm ship with the app, next to the Demo PDK.
  • Calibrated against the cells — the offset editor renders the PDK's actual GDS polygons and verifies every pin position; Check-All audits the whole library.
  • One design, one process — incompatible PDKs can't mix on a chip; free mixing lives in a Playground the status bar labels not manufacturable.
  • Design checks — bend-radius floors in router and handles, layer-divergence warnings, process-bound cross-sections.
  • GDS via gdsfactory or nazca — one Export menu, two GDS back-ends; your own components can be written in either. The MPW run stays between you and your foundry.
⇄ 1:1  canvas ↔ exported GDS (gdsfactory) same circuit · same scale · same position
What you draw is what you tape out: the MZI core drawn on the Lunima canvas next to the rendered polygons of the GDS actually exported through gdsfactory — every waveguide, bend and metal trace in the same place.
📤 Export  GDS via gdsfactory · nazca Check-All: 8/8 aligned | Δ 0.00 µm
The manufacturing story: the unified Export flyout over the chip listing gdsfactory and nazca GDS back-ends, the PDK calibration editor rendering the SiEPIC grating coupler's actual GDS geometry with its pin sitting exactly on the cell origin, and an all-green Check-All calibration report.

If you don't trust black boxes

Open by design

Every stage has an escape hatch. Your circuit is a graph you can export, your PDK is JSON you can diff, and nothing in the pipeline requires you to stay.

  • gdsfactory YAML netlists — instances with settings, placements, logical connections (metal traces marked # electrical) and exposed ports — ready for SAX and any gdsfactory flow.
  • Open JSON PDKs — documented, human-readable, version-controllable.
  • GDS export — through gdsfactory or nazca, into your fabrication pipeline.
  • Autorouting is optional — style it, freeze it, or route yourself; your edits are never overwritten.
  • AI design assistant — describe a circuit in natural language, with your own Claude API key.
Netlist  gdsfactory YAML 12 instances, 12 connections, 2 ports
Netlist export: a gdsfactory YAML circuit netlist derived from the canvas — instances with settings, informational placements, logical port-to-port connections with metal traces marked electrical, and exposed ports.

Five languages, one canvas

English · Deutsch · Español · 简体中文 · 日本語

Auto-detected from your system and live-switchable — every toolbar, panel and canvas HUD string re-reads instantly, no restart.

Mode:  Select  ⇄  モード: 選択 i18n — live switch
The same Lunima main window shown side by side in English and Japanese — every toolbar, panel and canvas string is localized.

Get Lunima

Download v0.12.0

Free and MIT-licensed. Once installed, Lunima updates itself in place — download, swap, relaunch — on all three platforms.

Windows

x64

Lunima-Setup-0.12.0.msi Lunima-0.12.0-win-x64.zip

Installer, or portable zip — unzip and run.

Linux

x64

Lunima-0.12.0-linux-x64.tar.gz

Extract into its own folder and run.

macOS

Apple Silicon · Intel

Lunima-0.12.0-osx-arm64.dmg Lunima-0.12.0-osx-x64.dmg

Unsigned build — see the first-launch note below.

macOS first launch: xattr -dr com.apple.quarantine /Applications/Lunima.app
All versions: github.com/aignermax/Lunima/releases

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